Please use this identifier to cite or link to this item:
http://148.72.244.84/xmlui/handle/xmlui/15882
Full metadata record
DC Field | Value | Language |
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dc.contributor.author | سعد محمد صالح, Al-Azawi, Saad | - |
dc.date.accessioned | 2025-02-12T08:01:35Z | - |
dc.date.available | 2025-02-12T08:01:35Z | - |
dc.date.issued | 2019 | - |
dc.identifier.citation | https://www.scopus.com/authid/detail.uri?authorId=36614945900 | en_US |
dc.identifier.other | DOI10.1016/j.dsp.2018.09.001 | - |
dc.identifier.uri | http://148.72.244.84/xmlui/handle/xmlui/15882 | - |
dc.description.abstract | The efficient implementation of 3-D transforms is a challenging task due to the computation complexity, memory and area requirements of such transforms. One important 3-D transform is the 3-D Discrete Cosine Transform (3-D DCT) used in many image and video processing systems. In this paper, two new pipeline architectures for the 3-D DCT computation using the 3-D DCT Vector-Radix algorithm (3-D DCT VR) are presented. These architectures are scalable and parameterisable with regards to different wordlengths and pipelining levels. Their arithmetic component requirements are reduced to the order of O (log(2) N) in contrast with O(N) for 3-D DCT architectures in the literature, while at the same time they can keep similar or better area-time complexity. (C) 2018 Elsevier Inc. All rights reserved. | en_US |
dc.language.iso | en | en_US |
dc.publisher | جامعة ديالى / University Of Diyala | en_US |
dc.subject | New fast and area | en_US |
dc.title | New fast and area-efficient pipeline 3-D DCT architectures | en_US |
dc.type | Article | en_US |
Appears in Collections: | نتاجات باحتي الجامعة (سكوباس) لعام 2020(Scopus) |
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